fdb8860 _ f085 n-channel logic level powertrench ? mosfet ?20 10 fairchild semiconductor corporation fdb8860 _f085 r ev a www.fairchildsemi.com 1 fdb 8860 f 085 n-channel logic level powertrench ? mosfet 30v, 80a, 2.6m features r ds(on) = 1.9m (typ), v gs = 5v, i d = 80a q g(5) = 89nc (typ), v gs = 5v low miller charge low q rr body diode uis capability (single pulse and repetitive pulse) qualified to aec q101 rohs compliant applications 12v automotive load control start / alternator systems electronic power steering systems abs dc-dc converters june 20 10 _
fdb886 0 _f085 re v a www.fairchildsemi.com 2 electrical characteristics t j = 25c unless otherwise noted of f characteristics on characteristics dynamic characteristics symbol parameter test conditions min typ max units bv dss dr ain to source breakdown voltage i d = 1ma, v gs = 0v 30 - - v i dss zero gate voltage drain current v ds = 24v v gs = 0v --1 a t j = 150c - - 250 i gss gate to sour ce leakage current v gs = 20 v-- 100 na v gs(t h) gate to sour ce threshold voltage v ds = v gs , i d = 250 a 1 1.7 3 v r ds(on) dr ain to source on resistance i d = 80a, v gs = 10v - 1.6 2.3 m i d = 80 a, v gs = 5v - 1.9 2.6 i d = 80 a, v gs = 4.5 v - 2.1 2.7 i d = 80 a, v gs = 10 v, t j = 175c - 2.5 3.6 c iss input c apacitance v ds = 15v, v gs = 0v, f = 1mhz - 9460 12585 pf c oss output capa citance - 1710 2275 pf c rss reverse t ransfer capacitance - 1050 1575 pf r g gate resi stance f = 1mhz - 1.8 - q g(tot) tot al gate charge at 10v v gs = 0v to 10v v dd = 15v i d = 80a i g = 1.0 ma - 165 214 nc q g( 5) tot al gate charge at 5v v gs = 0v to 5v - 89 115 nc q g( th) thr eshold gate charge v gs = 0v to 1v - 9.1 12 nc q gs gate to source gate c harge - 26 - nc q gs2 gate char ge threshold to plateau - 18 - nc q gd gate to drain miller charge - 33 - nc mosfet maximum ratings t c = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol par ameter ratings units v dss dr ain to source voltage 30 v v gs gate to source voltage 20 v i d dr ain current continuous (v gs = 10v, t c < 163 o c) 80 a con tinuous (v gs = 5v, t c < 162 o c) 80 a con tinuous (v gs = 10v, t c = 25 o c, with r ja = 43 o c/w) 31 a pulsed figure 4 a e as s i n g l e p u l s e a v a l a n c h e e n e r g y ( n o t e 1 ) 9 4 7 mj p d power dissipation 254 w derate above 25 o c1.7 w/ o c t j , t st g opera ting and storage temperature -55 to +175 o c r jc t hermal resistance junction to case 0.59 o c/w r ja t hermal resistance junction to ambient (note 2) 62 o c/w r ja t hermal resistance junction to ambient to-263,1in 2 copper pad area 43 o c/w device marking device package reel size tape width quantity _f085 24mm 800units f db8860 fdb8860 to-263ab 330mm fdb8860 _ f085 n-channel logic level powertrench ? mosfet
electrical characteristics t j = 25c unless otherwise noted switching characteristics drain-source diode cha racteristics symbol parameter test conditions min typ max units t (on) turn-on time v dd = 15v, i d = 80a v gs = 5v, r gs = 1 - - 340 ns t d(on) turn-on delay time - 14 - ns t r turn-on rise time - 213 - ns t d(off) turn-off delay time - 79 - ns t f turn-off fall time - 49 - ns t off turn-off time - - 192 ns v sd source to drain diode voltage i sd = 80a - - 1.25 v i sd = 40a - - 1.0 v t rr reverse recovery time i sd = 80a, di sd /dt = 100a/ s- - 43 ns q rr reverse recovery charge i sd = 80a, di sd /dt = 100a/ s- - 29 nc notes: 1: starting t j = 25 o c, l =0.47mh, i as = 64a , v dd = 30v, v gs = 10v. 2: pulse width = 100s this product has been designed to meet the extreme test conditions and environment demanded by the automotive industry. for a copy of the requirements, see aec q101 at: http://www.aecouncil.com/ all fairchild semiconductor products are manufactured, assembled and tested under iso9000 and qs9000 quality systems certification. fdb8860 _ f085 n-channel logic level powertrench ? mosfet fdb886 0 _f085 re v a www.fairchildsemi.com 3
typical characteristics t j = 25c unless otherwise noted figure 1. normalized power dissipation vs case temperature figure 2. maximum continu ous drain current vs case temperature figure 3. normalized maximum t ransient thermal impedance figure 4. peak current capability 0 25 50 75 100 125 150 175 0.0 0.2 0.4 0.6 0.8 1.0 1.2 power dissipation muliplier t c , case temperature ( o c ) 25 50 75 100 125 150 175 0 75 150 225 300 v gs = 10v v gs = 5v current limited by package i d , drain current (a) t c , case temperature ( o c ) 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 0.01 0.1 1 normalized thermal impedance z ja t, rectangular pulse duration (s) d = 0.5 0.2 0.1 0.05 0.02 0.01 single pulse 2 duty cycle-descending order notes: duty factor: d = t 1 /t 2 peak t j = p dm x z jc x r jc + t c p dm t 1 t 2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 100 1000 i (pk) , peak current ( a ) t, pulse width (s) single pulse 3000 50 t c = 25 o c i = i 25 175 - t c 150 for temperatures above 25 o c derate peak current as follows: fdb8860 _ f085 n-channel logic level powertrench ? mosfet fdb886 0 _f085 re v a www.fairchildsemi.com 4
figure 5. forwar d bias safe operating area note: refer to fairchild application notes an7514 and an7515 figure 6. unclamped inductive switching c apability figure 7. transfer characteristics figure 8. saturation characteristics figure 9. drain to source on-resistance variation vs gate to source voltage figure 10. normalized drain to source on resistance vs junction temperature typical characteristics t j = 25c unless otherwise noted 110 0.1 1 10 100 1000 10us 10ms dc 100ms 1ms 100us i d , drain current(a) v ds , drain to source voltage(v) 60 limited by r ds(on) area may be operation in this t c = 25 o c t j = max rated single pulse by package current limited 0.1 1 10 100 1000 10000 1 10 100 starting t j = 150 o c i as , avalanche current (a) t av , time in avalanche (ms) starting t j = 25 o c 500 t av = (l)(i as )/(1.3*rated bv dss - v dd ) if r = 0 if r 0 t av = (l/r)ln[(i as *r)/(1.3*rated bv dss - v dd ) +1] 1.0 1.5 2.0 2.5 3.0 3.5 0 40 80 120 160 t j = -55 o c t j = 25 o c t j = 175 o c pulse duration = 80 s duty cycle = 0.5% max v dd = 5v i d , drain current (a) v gs , gate to source voltage (v) 0.00.20.40.60.81.0 0 20 40 60 80 100 120 v gs = 4v v gs = 10v v gs = 5v v gs = 3v pulse duration = 80 s duty cycle = 0.5% max i d , drain current (a) v ds , drain to source voltage (v) 345678910 1.5 2.0 2.5 3.0 3.5 4.0 t j = 25 o c pulse duration = 80 s duty cycle=0.5% max r ds(on) , drain to source on-resistance ( m v gs , gate to source voltage (v) i d = 40a t j = 175 o c -80 -40 0 40 80 120 160 200 0.6 0.8 1.0 1.2 1.4 1.6 i d = 80a v gs = 10v pulse duration = 80 s duty cycle = 0.5% max t j , junction temperature ( o c ) normalized drain to source on-resistance fdb8860 _ f085 n-channel logic level powertrench ? mosfet fdb886 0 _f085 re v a www.fairchildsemi.com 5
figure 11. normalized gate threshold voltage vs junction temperature figure 12. normalized drain to source breakdown voltage vs junction temperature figure 13. capacitance vs drain to source voltage figure 14. gate charge vs gate to source voltage typical characteristics t j = 25c unless otherwise noted -80 -40 0 40 80 120 160 200 0.2 0.4 0.6 0.8 1.0 1.2 1.4 normalized gate threshold voltage t j , junction temperature ( o c ) v gs = v ds i d = 250 a -80 -40 0 40 80 120 160 200 0.90 0.95 1.00 1.05 1.10 normalized drain to source breakdown voltage t j , junction temperature ( o c ) i d = 1ma 0.1 1 10 1000 10000 30 c rss c oss capacitance (pf) v ds , drain to source voltage (v) c iss f = 1mhz v gs = 0v 500 20000 0 20 40 60 80 100 120 140 160 180 0 2 4 6 8 10 i d = 1a v gs , gate to source voltage ( v ) q g , gate charge (nc) v dd = 15v i d = 80a fdb8860 _ f085 n-channel logic level powertrench ? mosfet fdb886 0 _f085 re v a www.fairchildsemi.com 6
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